PVDM3-128 Specification
PVDM3 Modules Specifications |
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Components |
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DSP |
Multicore DSP technology |
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DSP external memory |
512-megabit double-data-rate (DDR) synchronous dynamic random access memory (SDRAM) for each DSP |
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Interface |
240-pin dual-inline-memory-module (DIMM) interface |
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Features |
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Echo cancellation |
Software echo cancellation compliant with ITU-T G.168, with 128-ms tail coverage |
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Operating temperature |
-41 to 131 ?F (-5 to 55 ?C) |
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Voltage |
3.3V |
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Current |
1.47A |
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Power |
4.85W |
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Regulatory and Compliance |
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Safety |
?? Complies with IEC 60950 (worldwide) and AS/NZS 60950-1 (Australia and New Zealand), CAN/CSA-C22.2 No. 60950-1, 1st and 2nd Ed. (Canada), and GB4943-95 (People’s Republic of China) ?? EN60950-1, 1st and 2nd Ed. (CENELEC; includes EU and EFTA) ?? NOM-019-SCFI-1998 (Mexico), and UL 60950-1, 1st and 2nd Ed. (United States) |
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Homologation |
Platform dependent |
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Mean time between failure (MTBF) |
System dependent |
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EMC |
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Emissions |
?? CISPR22, Class B ?? EN55022, Class B, CFR47, Part 15, Subpart B, Class B |
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Harmonics |
EN61000-3-2 |
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Flicker |
EN61000-3-3 |
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Immunity |
?? CISPR24 ?? EN 55024 ?? EN50082-1 |
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Electrostatic discharge (ESD) |
EN 61000-4-2 |
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RF fields |
EN 61000-4-3 |
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EFT |
EN 61000-4-4 |
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Surge |
EN 61000-4-5 |
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Conducted RF |
EN 61000-4-6 |
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Power-frequency magnetic fields |
EN 6100-4-8 |
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Voltage dips, sags, and interruptions |
EN 61000-4-11 |